This specification relates to tunnel junction fabrication, for example, superconducting junction fabrication. In recent years, superconducting tunnel junctions have become a viable technology for a wide range of cryogenic applications. There is intense interest in solid-state quantum computing based on a range of systems that include superconducting-insulating-superconducting (SIS) trilayers as the building blocks for quantum bits (qubits) in quantum computers. Normal-insulating-superconducting (NIS) junctions have been used as on-chip solid-state refrigerators and more recently as bulk cryogenic coolers.
Both SIS and NIS technologies utilize pristine dielectric barriers a few nanometers thick to serve as tunnel junctions. These barriers are typically fabricated via thermal oxidation of Al or Al alloys using a controlled combination of temperature, partial pressure of oxygen, and time. However, the diffusive nature of the thermal oxidation process leads to point defects in the tunnel barrier that affect junction quality. Currently, barriers for tunnel junctions are created using diffuse oxidation processes that can limit device performance.